Paper
20 April 2011 Diffraction based overlay re-assessed
Author Affiliations +
Abstract
In recent years, numerous authors have reported the advantages of Diffraction Based Overlay (DBO) over Image Based Overlay (IBO), mainly by comparison of metrology figures of merit such as TIS and TMU. Some have even gone as far as to say that DBO is the only viable overlay metrology technique for advanced technology nodes; 22nm and beyond. Typically the only reported drawback of DBO is the size of the required targets. This severely limits its effective use, when all critical layers of a product, including double patterned layers need to be measured, and in-die overlay measurements are required. In this paper we ask whether target size is the only limitation to the adoption of DBO for overlay characterization and control, or are there other metrics, which need to be considered. For example, overlay accuracy with respect to scanner baseline or on-product process overlay control? In this work, we critically re-assess the strengths and weaknesses of DBO for the applications of scanner baseline and on-product process layer overlay control. A comprehensive comparison is made to IBO. For on product process layer control we compare the performance on critical process layers; Gate, Contact and Metal. In particularly we focus on the response of the scanner to the corrections determined by each metrology technique for each process layer, as a measure of the accuracy. Our results show that to characterize an overlay metrology technique that is suitable for use in advanced technology nodes requires much more than just evaluating the conventional metrology metrics of TIS and TMU.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Philippe Leray, David Laidler, Koen D'havé, and Shaunee Cheng "Diffraction based overlay re-assessed", Proc. SPIE 7971, Metrology, Inspection, and Process Control for Microlithography XXV, 797114 (20 April 2011); https://doi.org/10.1117/12.882353
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Cited by 1 scholarly publication.
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KEYWORDS
Overlay metrology

Calibration

Metrology

Semiconducting wafers

Process control

Etching

Silicon

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