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20 April 2011Simulation of non-uniform wafer geometry and thin film residual stress on overlay errors
The deposition of residually stressed films in semiconductor manufacturing processes introduces elastic distortions in the
wafer that can contribute to overlay errors in lithographic patterning. The distortion induced by film deposition causes
out-of-plane distortion (i.e. wafer shape) that can be measured with commercial metrology tools as well as in-plane
distortion that leads to overlay errors. In the present work, overlay errors and out-of-plane distortion of wafers resulting
from residual stresses that are non-uniform over the area of wafer are examined using computational mechanics
modeling. The results of these simulations are used to examine the correlations between wafer shape features and
overlay errors. Specifically, connections between overlay errors and metrics based on the slope of the wafer shape are
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Sathish Veeraraghaven, Kevin T. Turner, Jaydeep Sinha, "Simulation of non-uniform wafer geometry and thin film residual stress on overlay errors," Proc. SPIE 7971, Metrology, Inspection, and Process Control for Microlithography XXV, 79711U (20 April 2011); https://doi.org/10.1117/12.879493