22 March 2011 Full-chip source and mask optimization
Author Affiliations +
A cost-efficient technique for full-chip source and mask optimization is proposed in this paper. This technique has two components: SMO source optimization for full-chip and flexible mask optimization (FMO). During the technology development stage of source optimization, a novel pattern-selection technique was used to identify critical clips from a full-set of design clips; SMO was then used to optimize the source based on those selected critical-clips. This pattern-selection technique enables reasonable SMO runtime to optimize the source that covers the full range of patterns. During the process development stage and product tapeout stage, FMO is employed. The FMO framework allows the use of different OPC computational techniques on different chip areas that have different sensitivities to process variations. Advanced OPC methods are applied only where they are needed, therefore achieving optimum process performance with the least tapeout and mask cost.
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Min-Chun Tsai, Min-Chun Tsai, Stephen Hsu, Stephen Hsu, Luoqi Chen, Luoqi Chen, Yen-Wen Lu, Yen-Wen Lu, Jiangwei Li, Jiangwei Li, Frank Chen, Frank Chen, Hong Chen, Hong Chen, Jun Tao, Jun Tao, Been-Der Chen, Been-Der Chen, Hanying Feng, Hanying Feng, William Wong, William Wong, Wei Yuan, Wei Yuan, Xiaoyang Li, Xiaoyang Li, Zhipan Li, Zhipan Li, Liang Li, Liang Li, Russell Dover, Russell Dover, Hua-yu Liu, Hua-yu Liu, Jim Koonmen, Jim Koonmen, } "Full-chip source and mask optimization", Proc. SPIE 7973, Optical Microlithography XXIV, 79730A (22 March 2011); doi: 10.1117/12.881633; https://doi.org/10.1117/12.881633

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