A hybrid system, composed of a SPAD fabricated in a dedicated detector technology coupled to a CMOS readout ASIC,
is presented. The SPADs under test have an active area of 380 μm2, while the ASIC is built in a 0.35 μm CMOS
technology and has 16 readout channels, each one featuring an active quenching circuit and four time-gated 8-bit
counters, with programmable gate duration. In the paper we will discuss the Dark Count Rate, Gain and Afterpulsing
Probability performances with respect to relevant system parameters, such as Overvoltage, Off Time and Precharge
Time, as well as FLIM measurements with the system.