A high performance readout circuit (ROIC) with BDI structure for SWIR FPAs

Li-chao Hao; Rui-jun Ding; Ai-bo Huang; Hong-lei Chen; Chun Zhou; Pan Wang

doi:10.1117/12.899599

8 September 2011 A high performance readout circuit (ROIC) with BDI structure for SWIR FPAs

Li-chao Hao, Rui-jun Ding, Ai-bo Huang, Hong-lei Chen, Chun Zhou, Pan Wang

Proceedings Volume 8193, International Symposium on Photoelectronic Detection and Imaging 2011: Advances in Infrared Imaging and Applications; 819317 (2011) https://doi.org/10.1117/12.899599
Event: International Symposium on Photoelectronic Detection and Imaging 2011, 2011, Beijing, China

Abstract

In our study, we designed a 512×512 readout integrated circuit (ROIC) for N-on-P short wave infrared (SWIR) detectors, which has the ability to operate with two capacitors for different input current levels from very low background applications to daytime high illumination conditions. A buffered direct injection (BDI) readout cell as input circuit provides a low input resistance, high injection efficiency, and precise biasing voltage to the photodiode at low input currents. In order to reduce the noise of the BDI readout cell, a high-performance single stage amplifier is devised, the gain of which reaches as high as 50dB. The input MOSFET of the amplifier operates at sub-threshold region to keep the photodiode at precise reverse bias and steady injection efficiency. At the same time, with the input MOSFET at sub-threshold region, the current is smaller than at saturation region, and the power dissipation is reduced to a low level. A sample and hold circuit is also part of the input unit cell architecture, which allows the infrared focal plane array (IRFPA) to be operated in full frame snapshot mode and rolling mode. To prevent the excess of total current of the ROIC, the reset time of every row has a lag of one period compared to the previous row. The simulation results confirm these advantages. With the 5.0V power supply, ROIC provides the output dynamic range over 2.5V, the well capacity more than 1×10⁶e-, and the total power dissipation less than 120mW. The final chip is fabricated with HHNEC 0.35um 1P4M process technology, and the pixel occupies a 30um×30um area. The Testing results are coincide with the simulations of the circuit. With the detecting current varies from 30pA to 1nA, the linearity of BDI is 99%, and it can be operated at the temperatures below 77K.

Citation Download Citation

Li-chao Hao, Rui-jun Ding, Ai-bo Huang, Hong-lei Chen, Chun Zhou, and Pan Wang "A high performance readout circuit (ROIC) with BDI structure for SWIR FPAs", Proc. SPIE 8193, International Symposium on Photoelectronic Detection and Imaging 2011: Advances in Infrared Imaging and Applications, 819317 (8 September 2011); https://doi.org/10.1117/12.899599

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available