This PDF file contains the front matter associated with SPIE Proceedings Volume 8265, including the Title Page, Copyright information, Table of Contents, and the Conference Committee listing.

Future fiber systems in computer communications applications must meet growing bandwidth requirements, while maintaining feasible power and cost targets in addition to maintaining manageable volumes of fiber cabling. Therefore, bandwidth-per-fiber represents a critical design metric for next-generation systems. Here, a multicore fiber technology based on multimode graded-index cores is reviewed. A full link demonstration using six cores transmitting up to 20 Gb/s each is achieved between custom transmitter and receiver assemblies, which interface directly to the multicore fiber. The demonstrated technology may provide the added bandwidth per link required in next generation HPC systems.

The high bandwidth density and low power consumption characteristics of silicon photonics devices can provide a high performance interconnect solution for multiprocessor systems. At the same time this technology also poses a new set of constraints and challenges in architecting, designing, and integrating such systems. The "macrochip" multiprocessor architecture leverages a photonically interconnected array of processor and/or memory chips to provide a flexible platform to build heterogeneous systems. The design considerations for such a system are influenced largely by the system architecture, the programming model and devices needed for their implementation. This talk will first describe the macrochip platform, technology constraints and potential interconnect solutions with the various device building blocks. Then it will present some topology choices that range from a WDM point-to-point interconnect to more complex switched data channel networks. It will close with a detailed analysis of these design choices and show the impact of the device constraints on performance and power consumption along with some recent ultra-low power device implementation results.

Silicon photonics is an emerging technology offering novel solutions in different areas requiring highly integrated communication systems for optical networking, sensing, bio-applications and computer interconnects. Silicon photonicsbased communication has many advantages over electric wires for multiprocessor and multicore macro-chip architectures including high bandwidth data transmission, high speed and low power consumption. Following the INTEL's concept to "siliconize" photonics, silicon device technologies should be able to solve the fabrication problems for six main building blocks for realization of optical interconnects: light generation, guiding of light including wavelength selectivity, light modulation for signal encoding, detection, low cost assembly including optical connecting of the devices to the real world and finally the electronic control systems.

The need for low-energy high bandwidth optical solutions is driving the acceptance of silicon photonics as the platform of choice to address connectivity bottlenecks. Kotura has focused on the development of a manufacturable silicon photonics platform to demonstrate the practical realization of this technology. In this paper, we will review the progress in the development of key photonics components on the 3 μm silicon-on-insulator (SOI) platform, including mode transformers, variable optical attenuators (VOAs), wavelength division multiplexers, Ge photodetectors, and Ge modulators. We will also review recent advances in the monolithic integration of the key building blocks to form a highperformance Terabit/s wavelength division multiplexed (WDM) receiver.

We report on the performance of an integrated four-channel parallel optical transceiver built in a CMOS photonics process, operating at 28 Gb/s per channel. The optical engine of the transceiver comprises a single silicon die and a hybrid integrated DFB laser. The silicon die contains the all functionalities needed for an optical transceiver: transmitter and receiver optics, electrical driver, receiver and control circuits. We also describe the CMOS photonics platform used to build such transceiver device, which consists of: an optically enabled CMOS process, a photonic device library, and a design infrastructure that is modeled after standard circuit design tools. We discuss how this platform can scale to higher speeds and channel counts.

This paper presents the first chip-scale demonstration of an intra-chip free-space optical interconnect (FSOI) we recently proposed. This interconnect system uses point-to-point free-space optical links to construct an all-to-all intra-chip communication network. Unlike other electrical and waveguide-based optical interconnect systems, FSOI exhibits low latency, high energy efficiency, and large bandwidth density with little degradation for long distance transmission, and hence can significantly improve the performance of future many-core chips. A 1x1-cm² chip prototype is fabricated on a germanium substrate with integrated photodetectors. A commercial 850-nm GaAs vertical-cavity-surface-emitting-laser (VCSEL) and fabricated fused silica micro-lenses are 3-D integrated on top of the germanium substrate. At a 1.4-cm distance, the measured optical transmission loss is 5 dB and crosstalk is less than -20 dB. The electrical-to-electrical bandwidth is 3.3 GHz, limited by the VCSEL.

We demonstrate low-loss photonic wire waveguides, in both the straight and bent waveguide configurations, fabricated by the LOCal Oxidation of Silicon (LOCOS) process, using the standard optical lithography. The oxidation in the LOCOS process produces waveguides in submicron dimensions with ultra-smooth sidewalls. The Full-Width Half- Maximum (FWHM) of the fabricated LOCOS wire waveguide is approximately 650 nm and the height is 280 nm. We used the cut-back method to measure the propagation loss of the TE (x-polarized) mode. The average propagation loss measured by the cut-back method was 8.78 dB/cm, while the minimum measured propagation loss achieved was 7.18 dB/cm for simple straight waveguides. The propagation loss is expected to be lower, as we include the scattering loss in the measurements. The measured bending loss of the LOCOS wire waveguide with a bending radius of 5 um is as low as 0.0089 dB/90° bend for the TE mode. To the best of knowledge, this is the first direct measurement in propagation loss and bending loss for LOCOS wire waveguides.

Semiconductor optical amplifiers based on quantum dots show small-signal cross-gain modulation bandwidths exceeding 40 GHz. In large signal operation wavelength conversion at 80 Gb/s over 10 nm is presented. Two section mode-locked lasers at 40 GHz yield ultra-low jitter of 200 fs in hybrid operation. Optical feedback presents an alternative way to effectively reduce the jitter and opens up the possibility to extract a microwave signal, having the same properties as the optical pulse comb, from the absorber section.

This paper presents our recent achievement with a simple white-light Mach-Zehnder (MZ) interferometric method to identify localized group velocity dispersion (GVD) coefficient or group delay dispersion (GDD) value of the nanostructured silicon waveguide devices (NSWDs). Conventional methods of measuring the GVD of optical fibers or waveguides are related to measurement of the total GVD of the entire fibers or NSWDs. Recently time-resolved heterodyne detection technique and the near-field scanning microscopy technique are demonstrated to measure localized group delay of the photonic crystal waveguides (PhCWs) devices, but the techniques have a limited group delay (GD) resolution depending on laser pulse-width used for the measurement. It is demonstrated that our white-light interferometric method can measure very accurate GDD value up to 0.5 fs/nm resolution. This method has been applied to determine not only the GVD or GDD profile of the entire NSWDs but also that of their localized structural sections, such as grating couplers and interface between the plain strip waveguide and single line-defect (W1) PhCW.

The optical properties of a nanoscale silicon slot-waveguide has been rigorously studied by using a full vectorial H-field finite element method (VFEM) based approach and presented in this paper. The variations of effective indices, effective areas, power densities in the slot-region and the confinement factors of the slot waveguide, with both horizontal and vertical slots, are thoroughly investigated for quasi-TM and TE modes. The full vectorial magnetic and electric field profiles, and Poynting vector (S^z) are also presented.

We present a CMOS sensor for accurate tracking of speckle movements on arbitrary surfaces. The sensor is made of a pair of comb filters with a pitch of 5.6μm and decayed by 90° to produce quadrature signals. The readout circuit is a 60 dB amplification chain with offset and KTC noise compensation. Integrated into a 180nm CMOS process, the sensor and readout circuit occupy an area of about 0.1mm² and consume 24μW at full speed of 64 ksample/s. The direction and frequency of the quadrature signals are resolved externally by zero-crossing detection, giving an accuracy of about 5μm. Thanks to a careful layout for gain error minimization, and the use of KTC noise cancellation, a negligible residual drift was observed, and a minimal displacement of 5μm was measured.

This work addresses the efficient modeling of hybrid large-scale photonic integrated circuits (PICs) comprising both, active and passive sub-elements. We describe a new modeling approach, the time-and-frequency-domain modeling (TFDM) that improves accuracy, memory requirements and simulation speed in comparison with traditional pure timedomain method. In TFDM, clusters of connected linear PIC elements are modeled in frequency domain, while interconnections between such clusters and non-passive PIC elements are modeled in the time domain. Behavioral models of the fundamental building blocks of PICs are presented and combined in several application examples showing the robustness of the entire modeling framework for PICs.

Silicon-on-insulator (SOI) nanowires give a very promising way to realize ultrasmall photonic integrated devices because of the ability for ultrasharp bending as well as the CMOS compatibility. As a typical integrated-type (de)multiplexer, ultrasmall arrayed-waveguide gratings (AWG) are very attractive for many applications. We have developed several types of ultrasmall SOI-nanowire AWG with novel layouts. SOI nanowires also give a good platform for optical sensing with high sensitivity because of the enhanced evanescent field. We have developed SOI-nanowire- based optical sensors by using MZI (Mech-Zehnder interferometer)-coupled microrings and cascaded rings. We also note that the size of an SOI nanowire is still limited to the order of wavelength in each direction. In contrast, surface plasmon (SP) waveguides could provide a nano-scale waveguiding and confinement of light. However, the conventional nano-scale SP waveguides are usually quite lossy. We have proposed two types of novel hybrid plasmonic waveguides to achieve nano-scale optical confinement and low-loss light propagation. Due to the ultra-high optical confinement, sub- μm² hybrid plasmonic devices (e.g., power splitters) are presented. It is also shown that hybrid plasmonic waveguide enables sub-μm bending and thus sub-μm resonator has been also demonstrated. The hybrid plasmonic waveguides offer a way to transfer both photonic and electronic signals along the same circuit, which is attractive for active components, e.g., tunable filters and optical modulators.

We demonstrate integrated plasmonic devices on silicon-on-insulator (SOI) substrate for photon-plasmon conversion and plasmonic mode transformation at near-infrared frequency. The plasmonic junction converts photons to surface plasmons and then back to photons with 7.35 dB conversion loss, and has successfully focused multimode plasmonic propagation to deep subwavelength (80 nm by 50 nm) single mode propagation with 2.28 dB/μm propagation loss. The integration approach leads to a robust and versatile platform for 3D nanoplasmonic gauges potentially functional in ultra-fast communications and optical sensing.