1 October 2011 Large-scale MOSFET and interconnect circuit simulation using iterated timing analysis and transmission line time step control
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Proceedings Volume 8285, International Conference on Graphic and Image Processing (ICGIP 2011); 82852U (2011) https://doi.org/10.1117/12.913594
Event: 2011 International Conference on Graphic and Image Processing, 2011, Cairo, Egypt
Abstract
In modern circuit design community, to perform large-scale circuit simulation for MOSFET and interconnect circuits is an important subject. This paper presents an efficient and robust way to satisfy this requirement. It uses ITA (Iterated Timing Analysis) algorithm, serving as the main algorithm, and a transmission line calculation algorithm, serving as the interconnect calculator, to do the simulation task. More important, accelerating methods to fasten both ITA and the transmission line calculator also proposed in this paper. All presented methods have been implemented and tested to justify their efficiency and robustness.
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Chun-Jung Chen, Chun-Jung Chen, } "Large-scale MOSFET and interconnect circuit simulation using iterated timing analysis and transmission line time step control", Proc. SPIE 8285, International Conference on Graphic and Image Processing (ICGIP 2011), 82852U (1 October 2011); doi: 10.1117/12.913594; https://doi.org/10.1117/12.913594
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