1 October 2011 Incremental circuit simulation for MOSFET circuits by using iterated timing analysis algorithm
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Proceedings Volume 8285, International Conference on Graphic and Image Processing (ICGIP 2011); 82852V (2011) https://doi.org/10.1117/12.913598
Event: 2011 International Conference on Graphic and Image Processing, 2011, Cairo, Egypt
Abstract
Circuit simulation is important and time-consuming. The circuit level incremental simulation is a good strategy to reduce the simulation time, since most circuit designers use circuit simulators in a repeatedly-executing manner. This paper researches the incremental simulation by using the well-known ITA (Iterated Timing Analysis) algorithm for MOSFET circuits. Besides, a new incremental simulation strategy is presented. All proposed methods have been implemented and tested. Experimental results justify that ITA can undertake incremental simulation very well.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Chun-Jung Chen, "Incremental circuit simulation for MOSFET circuits by using iterated timing analysis algorithm", Proc. SPIE 8285, International Conference on Graphic and Image Processing (ICGIP 2011), 82852V (1 October 2011); doi: 10.1117/12.913598; https://doi.org/10.1117/12.913598
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