REBL (Reflective Electron Beam Lithography) is a novel concept for high speed maskless projection electron beam
lithography. Originally targeting 45 nm HP (half pitch) under a DARPA funded contract, we are now working on
optimizing the optics and architecture for the commercial silicon integrated circuit fabrication market at the equivalent of
16 nm HP. The shift to smaller features requires innovation in most major subsystems of the tool, including optics, stage,
and metrology. We also require better simulation and understanding of the exposure process.
In order to meet blur requirements for 16 nm lithography, we are both shrinking the pixel size and reducing the beam
current. Throughput will be maintained by increasing the number of columns as well as other design optimizations. In
consequence, the maximum stage speed required to meet wafer throughput targets at 16 nm will be much less than
originally planned for at 45 nm. As a result, we are changing the stage architecture from a rotary design to a linear
design that can still meet the throughput requirements but with more conventional technology that entails less technical
risk. The linear concept also allows for simplifications in the datapath, primarily from being able to reuse pattern data
across dies and columns. Finally, we are now able to demonstrate working dynamic pattern generator (DPG) chips,
CMOS chips with microfabricated lenslets on top to prevent crosstalk between pixels.