4 April 2012 Hybrid metrology solution for 1X node technology
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The accelerated pace of the semiconductor industry in recent years is putting a strain on existing dimensional metrology equipments (such as CDSEM, AFM, Scatterometry) to keep up with ever-increasing metrology challenges. However, a revolution appears to be forming with the recent advent of Hybrid Metrology (HM) - a practice of combining measurements from multiple equipment types in order to enable or improve measurement performance. In this paper we extend our previous work on HM to measure advanced 1X node layers - EUV and Negative Tone Develop (NTD) resist as well as 3D etch structures such as FinFETs. We study the issue of data quality and matching between toolsets involved in hybridization, and propose a unique optimization methodology to overcome these effects. We demonstrate measurement improvement for these advanced structures using HM by verifying the data with reference tools (AFM, XSEM, TEM). We also study enhanced OCD models for litho structures by modeling Line-edge roughness (LER) and validate its impact on profile accuracy. Finally, we investigate hybrid calibration of CDSEM to measure in-die resist line height by Pattern Top Roughness (PTR) methodology.
© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Alok Vaid, Alok Vaid, Alexander Elia, Alexander Elia, Mark Kelling, Mark Kelling, John Allgair, John Allgair, Carsten Hartig, Carsten Hartig, Peter Ebersbach, Peter Ebersbach, Erin McLellan, Erin McLellan, Matthew Sendelbach, Matthew Sendelbach, Nedal Saleh, Nedal Saleh, Narender Rana, Narender Rana, Hiroki Kawada, Hiroki Kawada, Toru Ikegami, Toru Ikegami, Masahiko Ikeno, Masahiko Ikeno, Takahiro Kawasaki, Takahiro Kawasaki, Cornel Bozdog, Cornel Bozdog, Helen Kim, Helen Kim, Elad Arnon, Elad Arnon, Roy Koret, Roy Koret, Igor Turovets, Igor Turovets, "Hybrid metrology solution for 1X node technology", Proc. SPIE 8324, Metrology, Inspection, and Process Control for Microlithography XXVI, 832404 (4 April 2012); doi: 10.1117/12.916940; https://doi.org/10.1117/12.916940

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