This paper reports the development of a new CTIA ROIC (MT6425CA) suitable for SWIR InGaAs detector arrays.
MT6425CA has a format of 640 × 512 with a pixel pitch of 25 μm and has a system-on-chip architecture, where all the
critical timing and biasing for this ROIC are generated by programmable blocks on-chip. MT6425CA is a highly
configurable and flexible ROIC, where many of its features can be programmed through a 3-wire serial interface
allowing on-the-fly configuration of many ROIC features. The ROIC runs on 3.3V supply voltage at nominal clock
speed of 10 MHz clock. It performs snapshot operation both using Integrate-Then-Read (ITR) and Integrate-While-
Read (IWR) modes. The CTIA type pixel input circuitry has a full-well-capacity (FWC) of about 320,000e-, with an
input referred read noise of less than 110e- at 300K. MT6425CA has programmable number of outputs, where 4, 2, or 1
output can be selected along with an analog reference for pseudo-differential operation. The integration time can be
programmed up to 1s in steps of 0.1μs. The gain and offset in the ROIC can be programmed to adjust the output offset
and voltage swing. ROIC dissipates less than 130mW from a 3.3V supply at full speed and full frame size with 4
outputs, providing both low-power and low-noise operation. MT6425CA is fabricated using a modern mixed-signal
CMOS process on 200mm CMOS wafers with a high yield above 75%, yielding more than 50 working parts per wafer.
It has been silicon verified, and tested parts are available either in wafer and die levels with a complete documentation
including test reports and wafer maps. A USB based camera electronics and camera development platform with
software are available to help customers to evaluate the imaging performance of MT6425CA in a fast and efficient way.