Resonant cavity quantum efficiency enhancement for near-infrared (NIR) detection in silicon detectors has been
extensively reported over the last several years. Cavity thickness uniformity has been achieved mainly by using silicon
on insulator (SOI) as starting material. Though this approach yields excellent response uniformity, it lacks the flexibility
of controlling the tuning wavelength and it is not suitable for processing in standard silicon CMOS technology.
Silicon Geiger avalanche Photodiode (GPD) technology with its single-photon sensitivity and nanosecond integration
time has seen accelerated development worldwide due to increased availability and lower cost of silicon processing.
However, the technology of fabricating large GPD arrays is being developed at a slower pace, mainly due to the need to
customize the readout circuitry (ROIC) to the application (counting, ranging or timing). We are developing the
technology to fabricate single-photon, silicon GPD arrays in standard CMOS assembled in flip-chip with dedicated
ROIC arrays and add resonant cavity enhancement (RC-GPD) to enhance their response to NIR photons. For
manufacturability, processing cost, and process flexibility reasons, we implement the resonant cavity process at the end
of the GPD+ROIC array fabrication.
We have reviewed at the SPIE DSS 2011 conference the silicon RC-GPD array technology developed at aPeak and have
pointed to the design and technological challenges to achieve uniform quantum efficiency response in NIR over large
GPD arrays. In this paper, we present the progress on tuning the resonant cavity over large RC-GPD arrays as well as the
functional validation of 32x32pixel ROICs designed to operate with such arrays. We also present the radiation hardness
data of the silicon GPD array technology (legacy technology used for RC-GPD fabrication) to proton and neutron