15 October 2012 Design of high-resolution digital microscope eyepiece based on FPGA
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The paper presents a low-cost and portable digital microscope eyepiece based on Field Programmable gate Array (FPGA). A 1.3 million pixels CMOS (Complementary Metal Oxide Semiconductor) sensor is used as the imaging sensor. To get higher performance, the image pre-processing is completed on hardware. After that, image data are transmitted into frame buffer through transmission channel constructed by FIFO and DMA controller. The display controller gets the data from the frame buffer and sends them to the DVI/HDMI transmitter to encode the data by TMDS. All the control logic is realized inside one EP2C20 FPGA chip based on SoPC (System on a Programmable Chip) Framework and Nios II processer core is considered as the control center. The design makes full use of FPGA parallel and pipeline processing technology to achieve the hardware and software co-design, which complete high-resolution image acquisition, caching and display. The maximum resolution of real-time preview could reach SXGA (1280 x 1024) with the frame rate up to 15 fps. The system also integrates SD card interface, which captures the BMP format file into the SD (Security Digital) card.
© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jin Cai, Jin Cai, Enguo Chen, Enguo Chen, Peng Liu, Peng Liu, Feihong Yu, Feihong Yu, } "Design of high-resolution digital microscope eyepiece based on FPGA", Proc. SPIE 8419, 6th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optoelectronic Materials and Devices for Sensing, Imaging, and Solar Energy, 84190V (15 October 2012); doi: 10.1117/12.973645; https://doi.org/10.1117/12.973645


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