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29 June 2012Mask CD uniformity metrology for logic patterning and its correlation to wafer data
With the next technology nodes 193nm lithography is pushed to its utmost limits. The industry is forced to print at low
k1 factor which goes along with a high MEEF. Additionally, new blank materials are being introduced for smaller nodes.
From 4x node and beyond, global CD uniformity on wafer is getting more critical and becomes key factor to ensure a
high yield in chip production. Advanced process control is required and correction strategies are applied to maintain tight
wafer CD uniformity. Beside other parameters, like scanner and etch process, mask CD uniformity is one main
contributor to the intra-field CD on wafer. To enable effective CDU correction strategies it is necessary to establish a
mask CD uniformity metrology which shows a good correlation to wafer prints. Especially for logic pattern mask
uniformity measurements to control intra-field CD uniformity becomes challenging.
In this paper we will focus on mask CD uniformity measurement for logic application utilizing WLCD, which is based
on aerial image technology. We will investigate 40nm node and 28nm node gate masks using 6% MoSi phase shifting
mask and MoSi binary mask respectively. Furthermore, we will correlate the mask CD uniformity data to wafer data to
evaluate the capability of WLCD to predict the intra-field wafer CD uniformity correctly in order to support feedforward
correction strategies. We will show that WLCD shows an excellent correlation to wafer data. Additionally, we
will provide an outlook on logic contact-hole masks showing first CD uniformity data and wafer correlation data.
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Bertrand Le Gratiet, Raphaël Zékri, Frank Sundermann, Thomas Trautzsch, Thomas Thaler, Robert Birkner, Ute Buttgereit, "Mask CD uniformity metrology for logic patterning and its correlation to wafer data," Proc. SPIE 8441, Photomask and Next-Generation Lithography Mask Technology XIX, 844106 (29 June 2012); https://doi.org/10.1117/12.976858