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15 October 2012Implementation of PCI Express bus communication for FPGA-based data acquisition system
This paper presents a PCI Express based system dedicated for communication with FPGA in data acquisition systems.
The system consisted of FPGA IP core containing PCIE endpoint tightly coupled with with the user core (further
denoted as “USR core”) and the DDR3 memory controller, together with Linux device driver. The Linux OS was
running on top of typical x86-64 system.
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Adrian Byszuk, Jacek Kołodziejski, Grzegorz Kasprowicz, Krzysztof Poźniak, Wojciech M. Zabołotny, "Implementation of PCI Express bus communication for FPGA-based data acquisition system," Proc. SPIE 8454, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2012, 84540N (15 October 2012); https://doi.org/10.1117/12.2000232