8 November 2012 Reflective electron-beam lithography performance for the 10nm logic node
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Maskless electron beam lithography has the potential to extend semiconductor manufacturing to the sub-10 nm technology node. KLA-Tencor is currently developing Reflective Electron Beam Lithography (REBL) for high-volume 10 nm logic (16 nm HP). This paper reviews progress in the development of the REBL system towards its goal of 100 wph throughput for High Volume Lithography (HVL) at the 2X and 1X nm nodes. In this paper we introduce the Digital Pattern Generator (DPG) with integrated CMOS and MEMs lenslets that was manufactured at TSMC and IMEC. For REBL, the DPG is integrated to KLA-Tencor pattern generating software that can be programmed to produce complex, gray-scaled lithography patterns. Additionally, we show printing results for a range of interesting lithography patterns using Time Domain Imaging (TDI).

Previously, KLA-Tencor reported on the development of a Reflective Electron Beam Lithography (REBL) tool for maskless lithography at and below the 22 nm technology node1. Since that time, the REBL team and its partners (TSMC, IMEC) have made good progress towards developing the REBL system and Digital Pattern Generator (DPG) for direct write lithography. Traditionally, e-beam direct write lithography has been too slow for most lithography applications. Ebeam direct write lithography has been used for mask writing rather than wafer processing since the maximum blur requirements limit column beam current - which drives e-beam throughput. To print small features and a fine pitch with an e-beam tool requires a sacrifice in processing time unless one significantly increases the total number of beams on a single writing tool. Because of the continued uncertainty with regards to the optical lithography roadmap beyond the 22 nm technology node, the semiconductor equipment industry is in the process of designing and testing e-beam lithography tools with the potential for HVL.
© (2012) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Regina Freed, Regina Freed, Thomas Gubiotti, Thomas Gubiotti, Jeff Sun, Jeff Sun, Anthony Cheung, Anthony Cheung, Jason Yang, Jason Yang, Mark McCord, Mark McCord, Paul Petric, Paul Petric, Allen Carroll, Allen Carroll, Upendra Ummethala, Upendra Ummethala, Layton Hale, Layton Hale, John Hench, John Hench, Shinichi Kojima, Shinichi Kojima, Walter Mieher, Walter Mieher, Chris F. Bevis, Chris F. Bevis, } "Reflective electron-beam lithography performance for the 10nm logic node", Proc. SPIE 8522, Photomask Technology 2012, 85221J (8 November 2012); doi: 10.1117/12.964978; https://doi.org/10.1117/12.964978

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