19 February 2013 A novel pixel design with hybrid type isolation scheme for low dark current in CMOS image sensor
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New isolation scheme for CMOS image sensor pixel is proposed and its improved dark current performance is reported. It is well known that shallow trench isolation (STI) is one of major sources of dark current in imager pixel due to the existence of interfacial defects at STI/Si interface. On the account STI-free structure over the whole pixel area was previously reported for reducing dark current. As the size of pixel pitch is shrunk, however, it becomes increasingly difficult to isolate in-pixel transistors electrically without STI. In this work, we implemented hybrid type isolation scheme of removing STI around photodiode to suppress the dark current and remaining STI near transistors to guarantee the electrical isolation of transistors in pixel. It was successfully achieved that the dark current was significantly reduced by removing the STI around the photodiode together with normal operation of in-pixel transistors.
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Sung Ho Choi, Sung Ho Choi, Yi Tae Kim, Yi Tae Kim, Min Seok Oh, Min Seok Oh, Young Hwan Park, Young Hwan Park, Jeong Jin Cho, Jeong Jin Cho, Young Heub Jang, Young Heub Jang, Hyung Jun Han, Hyung Jun Han, Jong Won Choi, Jong Won Choi, Ho Woo Park, Ho Woo Park, Sang Il Jung, Sang Il Jung, Hoon Sang Oh, Hoon Sang Oh, Jung Chak Ahn, Jung Chak Ahn, Hiroshige Goto, Hiroshige Goto, Chi Young Choi, Chi Young Choi, Yonghan Roh, Yonghan Roh, "A novel pixel design with hybrid type isolation scheme for low dark current in CMOS image sensor", Proc. SPIE 8659, Sensors, Cameras, and Systems for Industrial and Scientific Applications XIV, 86590F (19 February 2013); doi: 10.1117/12.2003697; https://doi.org/10.1117/12.2003697

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