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18 April 2013 Buckling characterization of gate all around silicon nanowires
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Abstract
Imaging of suspended silicon nanonwires (SiNW) by SEM reveals that some of the SiNW are buckled. Buckling can impact device performance and it is therefore important to characterize this phenomenon. Measuring the buckling of suspended silicon nanowires (SiNW) poses significant challenges: (1) Small dimensions - SiNW are made with diameters ranging from about 3 to 10 nm and the buckling is of a similar scale. (2) Accurate height measurements – buckling is a three dimensional phenomena.
To meet these challenges a new height map reconstruction technique was introduced, using the CDSEM side detectors signal. Measuring pixel by pixel position in X, Y and Z (height) dimensions, we can obtain the buckling vector gradient along the wire in three dimensions. In this paper we present: (1) A description of the height map reconstruction technique used. (2) Three dimensional characterization of SiNW: (a) SiNW buckling measurements (b) Characterization of buckling as a function of the SiNW length and width.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Shimon Levi, Ishai Schwarzband, Yakov Weinberg, Roger Cornell, Ofer Adan, Guy M. Cohen, Cheng Cen, and Lynne Gignac "Buckling characterization of gate all around silicon nanowires", Proc. SPIE 8681, Metrology, Inspection, and Process Control for Microlithography XXVII, 868130 (18 April 2013); https://doi.org/10.1117/12.2013810
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