12 April 2013 Manufacturability of computation lithography mask: current limit and requirements for sub-20nm node
Author Affiliations +
Abstract
The computational lithography such as inverse lithography technique (ILT) or source mask optimization (SMO) is considered as the necessary technique for the extremely low k1 lithography process of sub-20nm node. The ideal curvilinear mask design for computational lithography gives the impacts and requires many changes on the photomask fabrication from mask data preparation to measurement and inspection. In this paper, we present the current status and new requirements for the computational lithography mask in viewpoint of the manufacturability for mass production. The manufacturability of computational lithography mask can be realized by the predictable and manageable patterning quality. Here, we have proposed new data flow for ILT which covers what the preferred target design is for ILT, new verification method, required mask model accuracy, and resolution improvement method. Furthermore, considering acceptable writing time (<24 hours) and computation limit on convolution, the current ILT technique is shown to have the limit of application area.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jin Choi, Jin Choi, In-Yong Kang, In-Yong Kang, Ji Soong Park, Ji Soong Park, In Kyun Shin, In Kyun Shin, Chan-Uk Jeon, Chan-Uk Jeon, } "Manufacturability of computation lithography mask: current limit and requirements for sub-20nm node", Proc. SPIE 8683, Optical Microlithography XXVI, 86830L (12 April 2013); doi: 10.1117/12.2011341; https://doi.org/10.1117/12.2011341
PROCEEDINGS
9 PAGES


SHARE
RELATED CONTENT

Optimizing style options for subresolution assist features
Proceedings of SPIE (September 13 2001)
Focus latitude optimization for model-based OPC
Proceedings of SPIE (December 16 2003)
Making a trillion pixels dance
Proceedings of SPIE (March 06 2008)

Back to Top