12 April 2013 A comparative study of self-aligned quadruple and sextuple patterning techniques for sub-15nm IC scaling
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Abstract
Self-aligned multiple patterning (SAMP) techniques can potentially scale integrated circuits down to half-pitch 7nm. In this paper, we present a comparative analysis of self-aligned quadruple (SAQP) and sextuple (SASP) techniques by investigating their technological merits and limitations, process complexity and cost structures, strategy of layout decomposition/synthesis, and yield impacts. It is shown that SASP process complexity is comparable to that of SAQP process, while it offers 50% gain in feature density and may be extended for one more node. The overlay yield of cut process is identified to be a challenge when the minimum device feature is scaled to half-pitch 7nm. The mask design issues for various applications using each technique are discussed, and the corresponding layout decomposition/synthesis strategy for complex 2D patterning is proposed. Although the high-dose EUV single-cut process can save significant costs when applied to replace the 193i multiple-cut process to form fin/gate structures, our cost modeling results show that SADP+EUV approach is still not cost effective for patterning other critical layers that generally require the same mask number (and lithographic steps) as the non-EUV schemes.
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Yijian Chen, Yijian Chen, Weiling Kang, Weiling Kang, Pan Zhang, Pan Zhang, "A comparative study of self-aligned quadruple and sextuple patterning techniques for sub-15nm IC scaling", Proc. SPIE 8683, Optical Microlithography XXVI, 86830Z (12 April 2013); doi: 10.1117/12.2010582; https://doi.org/10.1117/12.2010582
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