SRAM circuit performance in the presence of process variability of self-aligned multiple patterning

Wei Xiao; Qi Cheng; Yijian Chen

doi:10.1117/12.2011686

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29 March 2013 SRAM circuit performance in the presence of process variability of self-aligned multiple patterning

Wei Xiao, Qi Cheng, Yijian Chen

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Proceedings Volume 8684, Design for Manufacturability through Design-Process Integration VII; 86840K (2013) https://doi.org/10.1117/12.2011686
Event: SPIE Advanced Lithography, 2013, San Jose, California, United States

Abstract

The impacts of self-aligned triple patterning (SATP) and self-aligned quadruple patterning (SAQP) process variability on SRAM circuit performance are studied in this paper. Different types of SRAM circuit variability such as intra-cell and inter-cell variability are discussed. Spatially periodic variation patterns of a SRAM array fabricated with SATP process is identified, while spatial variation of SAQP based SRAM array is found to be less significant. Statistical TCAD simulations are carried out to examine the process variability induced fluctuation of SRAM circuit performance. It is found that SRAM static noise margin (SNM) shrinks with increased variations in line-width roughness and CD, especially when the technology node is scaled down. Despite the SATP/SAQP process variability and the related SNM reduction, our simulations show that the induced fluctuation of SRAM circuits is still manageable. It is also confirmed that circuit stability and manufacturing yield of SAQP based SRAM are better than SATP based SRAM.

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Wei Xiao, Qi Cheng, and Yijian Chen "SRAM circuit performance in the presence of process variability of self-aligned multiple patterning", Proc. SPIE 8684, Design for Manufacturability through Design-Process Integration VII, 86840K (29 March 2013); https://doi.org/10.1117/12.2011686

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