Paper
29 March 2013 A novel methodology for building robust design rules by using design based metrology (DBM)
Myeongdong Lee, Seiryung Choi, Jinwoo Choi, Jeahyun Kim, Hyunju Sung, Hyunyoung Yeo, Myoungseob Shim, Gyoyoung Jin, Eunseung Chung, Yonghan Roh
Author Affiliations +
Abstract
This paper addresses a methodology for building robust design rules by using design based metrology (DBM). Conventional method for building design rules has been using a simulation tool and a simple pattern spider mask. At the early stage of the device, the estimation of simulation tool is poor. And the evaluation of the simple pattern spider mask is rather subjective because it depends on the experiential judgment of an engineer. In this work, we designed a huge number of pattern situations including various 1D and 2D design structures. In order to overcome the difficulties of inspecting many types of patterns, we introduced Design Based Metrology (DBM) of Nano Geometry Research, Inc. And those mass patterns could be inspected at a fast speed with DBM. We also carried out quantitative analysis on PWQ silicon data to estimate process variability. Our methodology demonstrates high speed and accuracy for building design rules. All of test patterns were inspected within a few hours. Mass silicon data were handled with not personal decision but statistical processing. From the results, robust design rules are successfully verified and extracted. Finally we found out that our methodology is appropriate for building robust design rules.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Myeongdong Lee, Seiryung Choi, Jinwoo Choi, Jeahyun Kim, Hyunju Sung, Hyunyoung Yeo, Myoungseob Shim, Gyoyoung Jin, Eunseung Chung, and Yonghan Roh "A novel methodology for building robust design rules by using design based metrology (DBM)", Proc. SPIE 8684, Design for Manufacturability through Design-Process Integration VII, 86840Q (29 March 2013); https://doi.org/10.1117/12.2009583
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KEYWORDS
Critical dimension metrology

Inspection

Metrology

Semiconducting wafers

Silicon

Photomasks

Lithography

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