TCAD analysis of self-heating effects in bulk silicon and SOI n-MOSFETs

Konstantin O. Petrosyants; Evgeny Orekhov; Igor Kharitonov; Dmitri A. Popov

doi:10.1117/12.2017550

8 January 2013 TCAD analysis of self-heating effects in bulk silicon and SOI n-MOSFETs

Konstantin O. Petrosyants, Evgeny Orekhov, Igor Kharitonov, Dmitri A. Popov

Proceedings Volume 8700, International Conference Micro- and Nano-Electronics 2012; 870016 (2013) https://doi.org/10.1117/12.2017550
Event: International Conference on Micro-and Nano-Electronics 2012, 2012, Zvenlgorod, Russian Federation

Abstract

In this paper we performed 2D and 3D device simulations to analyze the impact of technology scaling on the lattice heating in n-channel bulk silicon and silicon-on-insulator MOS transistors with gate lengths from 0.5 to 0.1 um. Maximum lattice temperatures and transistor thermal resistances for different gate lengths and bias voltages were calculated. The increase in device temperature and thermal resistance with transistor scaling was shown.

Citation Download Citation

Konstantin O. Petrosyants, Evgeny Orekhov, Igor Kharitonov, and Dmitri A. Popov "TCAD analysis of self-heating effects in bulk silicon and SOI n-MOSFETs", Proc. SPIE 8700, International Conference Micro- and Nano-Electronics 2012, 870016 (8 January 2013); https://doi.org/10.1117/12.2017550

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