In semiconductor manufacturing, scribe frame data generally is generated for each LSI product according to its specific
process design. Scribe frame data is designed based on definition tables of scanner alignment, wafer inspection and
customers specified marks. We check that scribe frame design is conforming to specification of alignment and
inspection marks at the end. Recently, in COT (customer owned tooling) business or new technology development, there
is no effective verification method for the scribe frame data, and we take a lot of time to work on verification. Therefore,
we tried to establish new verification method of scribe frame data by applying pattern matching and DRC (Design Rule
Check) which is used in device verification. We would like to show scheme of the scribe frame data verification using
DRC which we tried to apply. First, verification rules are created based on specifications of scanner, inspection and
others, and a mark library is also created for pattern matching. Next, DRC verification is performed to scribe frame data.
Then the DRC verification includes pattern matching using mark library. As a result, our experiments demonstrated that
by use of pattern matching and DRC verification our new method can yield speed improvements of more than 12 percent
compared to the conventional mark checks by visual inspection and the inspection time can be reduced to less than 5
percent if multi-CPU processing is used. Our method delivers both short processing time and excellent accuracy when
checking many marks. It is easy to maintain and provides an easy way for COT customers to use original marks. We
believe that our new DRC verification method for scribe frame data is indispensable and mutually beneficial.