24 January 2013 Optimization of write operation in phase change memory
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Proceedings Volume 8782, 2012 International Workshop on Information Storage and Ninth International Symposium on Optical Storage; 878211 (2013) https://doi.org/10.1117/12.2016972
Event: 2012 International Workshop on Information Data Storage and Ninth International Symposium on Optical Storage, 2012, Shanghai, China
Abstract
This paper presents an optimized write driver used in Phase change memory (PCM). To pursue fast RESET/SET operation, the proper clock scheme is applied, with the maximum frequency at about 200MHz. The write driver uses current pulses at a fixed frequency to successfully write into memory cells. Compared with the traditional SET operation, the novel dual-pulse SET operation divides the program pulse into 2 periods: pre-programming period provides large energy to cross the threshold-switching fast, programming period quenches the phase change resistance to that of the crystalline state. The optimization of the write operation decrease the program time and improves the resistance distribution.
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Xiao Hong, Xiao Hong, Zhitang Song, Zhitang Song, Houpeng Chen, Houpeng Chen, Yifeng Chen, Yifeng Chen, Cong Fu, Cong Fu, Xi Li, Xi Li, Yiyun Zhang, Yiyun Zhang, "Optimization of write operation in phase change memory", Proc. SPIE 8782, 2012 International Workshop on Information Storage and Ninth International Symposium on Optical Storage, 878211 (24 January 2013); doi: 10.1117/12.2016972; https://doi.org/10.1117/12.2016972
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