13 March 2013 The SMS4 cryptographic system design based on dynamic partial self-reconfiguration technology
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This paper describes SMS4 algorithm by using dynamic partial self-reconfiguration. The design is implemented on Xilinx VirtexII-Pro XC2VP30 FPGA devices. The partial self-reconfiguration encryption/decryption module data throughput is up to 50Mb/s, key expansion and encryption/decryption modules use 1606 and 1570 slices respectively, and the resource utilization ratio of the key expansion by using partial self-reconfiguration technology is less 32.03% and slices are less 757 than the non-reconfiguration technology. SMS4 implementation gets a good balance between high performance and low complexity in area. The theoretical and practical research of dynamic partial self-reconfiguration has a broad space for development and application prospect.
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Jianxin Wang, Jianxin Wang, Xianwei Gao, Xianwei Gao, Xiuying Li, Xiuying Li, Meili Sui, Meili Sui, "The SMS4 cryptographic system design based on dynamic partial self-reconfiguration technology", Proc. SPIE 8784, Fifth International Conference on Machine Vision (ICMV 2012): Algorithms, Pattern Recognition, and Basic Technologies, 878414 (13 March 2013); doi: 10.1117/12.2013947; https://doi.org/10.1117/12.2013947


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