Hardware Implementation Of An Artificial Neural Network

Ross A McClain Jr.; Charles H Rogers; William J.B Oldham

doi:10.1117/12.944095

3 May 1988 Hardware Implementation Of An Artificial Neural Network

Ross A McClain Jr., Charles H Rogers, William J.B Oldham

Proceedings Volume 0882, Neural Network Models for Optical Computing; (1988) https://doi.org/10.1117/12.944095
Event: 1988 Los Angeles Symposium: O-E/LASE '88, 1988, Los Angeles, CA, United States

Abstract

A hardware implementation of a lightly connected artificial neural network known as the Hogg-Huberman model (1) (2) is described. The hardware is built around NCR's Geometric Arithmetic Parallel Processor (GAPP) chip. A large perfor-mance gain is shown between this implementation and a simulation done in FORTRAN on a VAX 11/780. Even though the direct processor to processor communications are limited to nearest neighbors, models which require other connections can be implemented with this hardware.

Citation Download Citation

Ross A McClain Jr., Charles H Rogers, and William J.B Oldham "Hardware Implementation Of An Artificial Neural Network", Proc. SPIE 0882, Neural Network Models for Optical Computing, (3 May 1988); https://doi.org/10.1117/12.944095

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