1 October 2013 Increasing reticle inspection efficiency and reducing wafer print-checks using automated defect classification and simulation
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Abstract
IC fabs inspect critical masks on a regular basis to ensure high wafer yields. These requalification inspections are costly for many reasons including the capital equipment, system maintenance, and labor costs. In addition, masks typically remain in the “requal” phase for extended, non-productive periods of time. The overall “requal” cycle time in which reticles remain non-productive is challenging to control. Shipping schedules can slip when wafer lots are put on hold until the master critical layer reticle is returned to production. Unfortunately, substituting backup critical layer reticles can significantly reduce an otherwise tightly controlled process window adversely affecting wafer yields. One major requal cycle time component is the disposition process of mask inspections containing hundreds of defects. Not only is precious non-productive time extended by reviewing hundreds of potentially yield-limiting detections, each additional classification increases the risk of manual review techniques accidentally passing real yield limiting defects. Even assuming all defects of interest are flagged by operators, how can any person's judgment be confident regarding lithographic impact of such defects? The time reticles spend away from scanners combined with potential yield loss due to lithographic uncertainty presents significant cycle time loss and increased production costs. Fortunately, a software program has been developed which automates defect classification with simulated printability measurement greatly reducing requal cycle time and improving overall disposition accuracy. This product, called ADAS (Auto Defect Analysis System), has been tested in both engineering and high-volume production environments with very successful results. In this paper, data is presented supporting significant reduction for costly wafer print checks, improved inspection area productivity, and minimized risk of misclassified yield limiting defects.
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Sung Jae Ryu, Sung Taek Lim, Anthony Vacca, Peter Fiekowsky, Dan Fiekowsky, "Increasing reticle inspection efficiency and reducing wafer print-checks using automated defect classification and simulation", Proc. SPIE 8880, Photomask Technology 2013, 88800D (1 October 2013); doi: 10.1117/12.2028275; https://doi.org/10.1117/12.2028275
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