historically kept it out of mainstream fabs. Thanks to continuing EBDW advances combined with the industry’s move to
unidirectional (1D) gridded layout style, EBDW promises to cost-efficiently complement 193nm ArF immersion (193i)
optical lithography in high volume manufacturing (HVM).
Patterning conventional 2D design layouts with 193i is a major roadblock in device scaling: the resolution limitations of
optical lithography equipment have led to higher mask cost and increased lithography complexity. To overcome the
challenge, IC designers have used 1D layouts with “lines and cuts” in critical layers.1
Leading logic and memory chipmakers have been producing advanced designs with lines-and-cuts in HVM for several
technology nodes in recent years. However, cut masks in multiple optical patterning are getting extremely costly.
Borodovsky proposes Complementary Lithography in which another lithography technology is used to pattern line-cuts
in critical layers to complement optical lithography.2 Complementary E-Beam Lithography (CEBL) is a candidate to
pattern the Cuts of optically printed Lines.
The concept of CEBL is gaining acceptance. However, challenges in throughput, scaling, and data preparation rate are
threatening to deny CEBL’s role in solving industry’s lithography problem. This paper will examine the following
The challenges of massively parallel pixel writing
The solutions of multiple mini-column design/architecture in:
Boosting CEBL throughput
Resolving issues of CD control, CDU, LER, data rate, higher resolution, and 450mm wafers
The role of CEBL in next-generation solution of semiconductor lithography