CONFERENCE PROCEEDINGS
Advanced Search >
Home > Proceedings > Volume 8880 > Article
Translator Disclaimer
1 October 2013 Full chip implant correction with wafer topography OPC modeling in 2x nm bulk technologies
J-C. Michel; J-C. Le Denmat; E. Sungauer; F. Robert; E. Yesilada; A-M. Armeanu; J. Entradas; J. L. Sturtevant; T. Do; Y. Granik
Author Affiliations +
Proceedings Volume 8880, Photomask Technology 2013; 88801J (2013) https://doi.org/10.1117/12.2027291
Event: SPIE Photomask Technology, 2013, Monterey, California, United States
Abstract
Ionic implantation photolithography step considered to be non critical started to be influenced by unwanted overexposure by wafer topography with technology node downscaling evolution [1], [2]. Starting from 2xnm technology nodes, implant patterns modulated on wafer by classical implant proximity effects are also influenced by wafer topography which can cause drastic pattern degradation [2], [3]. This phenomenon is expected to be attenuated by the use of anti-reflecting coating but it increases process complexity and involves cost and cycle time penalty. As a consequence, computational lithography solutions are currently under development in order to correct wafer topographical effects on mask [3]. For ionic implantation source Drain (SD) on Silicon bulk substrate, wafer topography effects are the consequence of active silicon substrate, poly patterns, STI stack, and transitions between patterned wafer stack. In this paper, wafer topography aware OPC modeling flow taking into account stack effects for bulk technology is presented. Quality check of this full chip stack aware OPC model is shown through comparison of mask computational verification and known systematic defectivity on wafer. Also, the integration of topographical OPC model into OPC flow for chip scale mask correction is presented with quality and run time penalty analysis.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Citation Download Citation
J-C. Michel, J-C. Le Denmat, E. Sungauer, F. Robert, E. Yesilada, A-M. Armeanu, J. Entradas, J. L. Sturtevant, T. Do, and Y. Granik "Full chip implant correction with wafer topography OPC modeling in 2x nm bulk technologies", Proc. SPIE 8880, Photomask Technology 2013, 88801J (1 October 2013); doi: 10.1117/12.2027291; https://doi.org/10.1117/12.2027291
ACCESS THE FULL ARTICLE
PERSONAL SIGN IN
Full access may be available with your subscription
 
Forgot your username?
Forgot your password?
No SPIE account? Create an account
Institutional Access:
Sign in with your institutional credentials
PURCHASE THIS CONTENT
SUBSCRIBE TO DIGITAL LIBRARY
50 downloads per 1-year subscription
Members: $195
Non-members: $335 ADD TO CART
25 downloads per 1 - year subscription
Members: $145
Non-members: $250 ADD TO CART
PURCHASE SINGLE ARTICLE
Includes PDF, HTML & Video, when available
Members: $14.40
Non-members: $18.00 ADD TO CART
PROCEEDINGS
 10 PAGES
DOWNLOAD PDF SAVE TO MY LIBRARY
SHARE
GET CITATION
< Previous Article
|
Next Article >
Advertisement
Advertisement
KEYWORDS
RELATED CONTENT
Subscribe to Digital Library
Receive Erratum Email Alert
Back to Top