Lithographic equipments are highly complex machines used to manufacture integrated circuits (ICs). To make larger ICs, a larger lens is required, which, however, is prohibitively expensive. The solution to this problem is to expose a chip not in one flash but in a scanning fashion. For step-and-scan lithographic equipment (wafer scanner), the image quality is decided by many factors, in which synchronization of reticle stage and wafer stage during exposure is a key one. In this paper, the principle of reticle stage and wafer stage was analyzed through investigating the structure of scanners, firstly. While scanning, the reticle stage and wafer stage should scan simultaneously at a high speed and the speed ratio is 1:4. Secondly, an iterative learning controller (ILC) for synchronization of reticle stage and wafer stage is presented. In the controller, a master-slave structure is used, with the wafer stage acting as the master, and the reticle stage as the slave. Since the scanning process of scanner is repetitive, ILC is used to improve tracking performance. A simple design procedure is presented which allows design of the ILC system for the reticle stage and wafer stage independently. Finally, performance of the algorithm is illustrated by simulated on the virtual stages (the reticle stage and wafer stage).The results of simulation experiments and theory analyzing demonstrate that using the proposed controller better synchronization performance can be obtained for the reticle stage and wafer stage in scanner. Theory analysis and experiment shows the method is reasonable and efficient.