The image restoration algorithms based on time-frequency domain computation is high maturity and applied widely in
engineering. To solve the high-speed implementation of these algorithms, the TFDC hardware architecture is proposed.
Firstly, the main module is designed, by analyzing the common processing and numerical calculation. Then, to improve
the commonality, the iteration control module is planed for iterative algorithms. In addition, to reduce the computational
cost and memory requirements, the necessary optimizations are suggested for the time-consuming module, which
include two-dimensional FFT/IFFT and the plural calculation. Eventually, the TFDC hardware architecture is adopted
for hardware design of real-time image restoration system. The result proves that, the TFDC hardware architecture and
its optimizations can be applied to image restoration algorithms based on TFDC, with good algorithm commonality,
hardware realizability and high efficiency.