A FPGA-based architecture for real-time image matching

Jianhui Wang; Sheng Zhong; Wenhui Xu; Weijun Zhang; Zhiguo Cao

doi:10.1117/12.2031050

27 October 2013 A FPGA-based architecture for real-time image matching

Jianhui Wang, Sheng Zhong, Wenhui Xu, Weijun Zhang, Zhiguo Cao

Proceedings Volume 8920, MIPPR 2013: Parallel Processing of Images and Optimization and Medical Imaging Processing; 892003 (2013) https://doi.org/10.1117/12.2031050
Event: Eighth International Symposium on Multispectral Image Processing and Pattern Recognition, 2013, Wuhan, China

Abstract

Image matching is a fundamental task in computer vision. It is used to establish correspondence between two images taken at different viewpoint or different time from the same scene. However, its large computational complexity has been a challenge to most embedded systems. This paper proposes a single FPGA-based image matching system, which consists of SIFT feature detection, BRIEF descriptor extraction and BRIEF matching. It optimizes the FPGA architecture for the SIFT feature detection to reduce the FPGA resources utilization. Moreover, we implement BRIEF description and matching on FPGA also. The proposed system can implement image matching at 30fps (frame per second) for 1280x720 images. Its processing speed can meet the demand of most real-life computer vision applications.

Citation Download Citation

Jianhui Wang, Sheng Zhong, Wenhui Xu, Weijun Zhang, and Zhiguo Cao "A FPGA-based architecture for real-time image matching", Proc. SPIE 8920, MIPPR 2013: Parallel Processing of Images and Optimization and Medical Imaging Processing, 892003 (27 October 2013); https://doi.org/10.1117/12.2031050

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