27 October 2013 Hardware-efficient implementation of DFT using the first-order moments-based cyclic convolution structure
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Proceedings Volume 8920, MIPPR 2013: Parallel Processing of Images and Optimization and Medical Imaging Processing; 892005 (2013) https://doi.org/10.1117/12.2031144
Event: Eighth International Symposium on Multispectral Image Processing and Pattern Recognition, 2013, Wuhan, China
Abstract
This paper presents a hardware-efficient design for the one-dimensional (1-D) discrete Fourier transform (DFT). Once the 1-D DFT is formulated as the cyclic convolution form, the first-order moments-based structure can be used as the basic computing unit for the DFT computation, which only contains a control module, a statistical module and an accumulation module. The whole calculation process only contains shift operations and additions, with no need for multipliers and large memory. Compared with the traditional DA-based structure for DFT, the proposed design has better performance in terms of the area-throughput ratio and the power consumption, especially when the length of DFT is slightly longer. Similar efficient designs can be obtained for other computations, such as the DCT/IDCT, DST/IDST, digital filter and correlation, by transforming them into the forms of the first-order moments-based cyclic convolution.
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Li Cao, Li Cao, Jianguo Liu, Jianguo Liu, Jun Xiong, Jun Xiong, Chao Pan, Chao Pan, "Hardware-efficient implementation of DFT using the first-order moments-based cyclic convolution structure", Proc. SPIE 8920, MIPPR 2013: Parallel Processing of Images and Optimization and Medical Imaging Processing, 892005 (27 October 2013); doi: 10.1117/12.2031144; https://doi.org/10.1117/12.2031144
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