Paper
7 March 2014 Embedded FIR filter design for real-time refocusing using a standard plenoptic video camera
Christopher Hahne, Amar Aggoun
Author Affiliations +
Proceedings Volume 9023, Digital Photography X; 902305 (2014) https://doi.org/10.1117/12.2042495
Event: IS&T/SPIE Electronic Imaging, 2014, San Francisco, California, United States
Abstract
A novel and low-cost embedded hardware architecture for real-time refocusing based on a standard plenoptic camera is presented in this study. The proposed layout design synthesizes refocusing slices directly from micro images by omitting the process for the commonly used sub-aperture extraction. Therefore, intellectual property cores, containing switch controlled Finite Impulse Response (FIR) filters, are developed and applied to the Field Programmable Gate Array (FPGA) XC6SLX45 from Xilinx. Enabling the hardware design to work economically, the FIR filters are composed of stored product as well as upsampling and interpolation techniques in order to achieve an ideal relation between image resolution, delay time, power consumption and the demand of logic gates. The video output is transmitted via High-Definition Multimedia Interface (HDMI) with a resolution of 720p at a frame rate of 60 fps conforming to the HD ready standard. Examples of the synthesized refocusing slices are presented.
© (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Christopher Hahne and Amar Aggoun "Embedded FIR filter design for real-time refocusing using a standard plenoptic video camera", Proc. SPIE 9023, Digital Photography X, 902305 (7 March 2014); https://doi.org/10.1117/12.2042495
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CITATIONS
Cited by 13 scholarly publications and 22 patents.
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KEYWORDS
Cameras

Clocks

Finite impulse response filters

Image resolution

Field programmable gate arrays

Sensors

Lenses

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