Paper
28 March 2014 Increased throughput, determined by a suite of benchmark patterns, in a Gaussian electron-beam lithography tool with a 100 MHz writing rate
James H. Smith II, Nigel Crosland, Samuel Doran, Robert C. Dowling Jr., John G. Hartley, Philip C. Hoyle, David M. P. King, Lawrence Kutcher Jr., Andrew McClelland, Martin Turnidge
Author Affiliations +
Abstract
The Vistec VB3001 Gaussian electron-beam lithography system at the College of Nanoscale Science and Engineering (CNSE) in Albany routinely exposes 300 mm wafers to meet the requirements of nano-patterning for metrology and process tool qualification. CNSE and Vistec are partners in a continuous throughput improvement program. The second set of upgrades from this program has recently been implemented on CNSE’s VB300 and includes an increase in the maximum exposure clock frequency to 100 MHz and corresponding improvements to the sub-field deflection and beam blanker. To quantify the improvements, we have used an established suite of benchmark patterns2 to compare throughput “before and after”. These benchmark patterns show an average throughput improvement factor of 4 times over the timings at the start of the continuous improvement program.
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James H. Smith II, Nigel Crosland, Samuel Doran, Robert C. Dowling Jr., John G. Hartley, Philip C. Hoyle, David M. P. King, Lawrence Kutcher Jr., Andrew McClelland, and Martin Turnidge "Increased throughput, determined by a suite of benchmark patterns, in a Gaussian electron-beam lithography tool with a 100 MHz writing rate", Proc. SPIE 9049, Alternative Lithographic Technologies VI, 90490O (28 March 2014); https://doi.org/10.1117/12.2046609
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KEYWORDS
Lithography

Double patterning technology

Analog electronics

Beam shaping

Clocks

Photomicroscopy

Computer programming

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