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2 April 2014 Integrated production overlay field-by-field control for leading edge technology nodes
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Abstract
As photolithography will continue with 193nm immersion multiple patterning technologies for the leading edge HVM process node, the production overlay requirement for critical layers in logic devices has almost reached the scanner hardware performance limit. To meet the extreme overlay requirements in HVM production environment, this study investigates a new integrated overlay control concept for leading edge technology nodes that combines the run-to-run (R2R) linear or high order control loop, the periodic field-by-field or correction per exposure (CPE) wafer process signature control loop, and the scanner baseline control loop into a single integrated overlay control path through the fab host APC system. The goal is to meet the fab requirements for overlay performance, lower the cost of ownership, and provide freedom of control methodology. In this paper, a detailed implementation of this concept will be discussed, along with some preliminary results.
© (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Woong Jae Chung, John Tristan, Karsten Gutjahr, Lokesh Subramany, Chen Li, Yulei Sun, Mark Yelverton, Young Ki Kim, Jeong Soo Kim, Chin-Chou Kevin Huang, William Pierson, Ramkumar Karur-Shanmugam, Brent Riggs, Sven Jug, John C. Robinson, Lipkong Yap, and Vidya Ramanathan "Integrated production overlay field-by-field control for leading edge technology nodes", Proc. SPIE 9050, Metrology, Inspection, and Process Control for Microlithography XXVIII, 90501P (2 April 2014); https://doi.org/10.1117/12.2046076
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