Resist profile aware source mask optimization

Ao Chen; Yee Mei Foong; Michael Hsieh; Andrew Khoh; Stephen Hsu; Mu Feng; Jianhong Qiu; Chris Aquino

doi:10.1117/12.2046252

28 March 2014 Resist profile aware source mask optimization

Ao Chen, Yee Mei Foong, Michael Hsieh, Andrew Khoh, Stephen Hsu, Mu Feng, Jianhong Qiu, Chris Aquino

Proceedings Volume 9053, Design-Process-Technology Co-optimization for Manufacturability VIII; 90530X (2014) https://doi.org/10.1117/12.2046252
Event: SPIE Advanced Lithography, 2014, San Jose, California, United States

Abstract

In this paper, we present the approach and results of resist profile aware source mask optimization (SMO). In this approach, the cost functions for optimization include the image properties calculated not only from the resist bottom image planes, but also from the top image planes. Consequently, the optimized source and mask shapes are a good balance between the process window for the bottom CD’s, and top CD control to ensure a straight resist profile favorable for the etching process. We built up the flow of resist profile aware SMO and implemented it on a 1× nm node back-end layer. Two best candidate sources, SMO1 and SMO2 were generated from the conventional SMO flow and the resist profile aware SMO flow, respectively. The simulation results indicate that a better resist profile is achieved by SMO2, although it gives rise to a relatively smaller overlapping process window evaluated at the resist bottom. Wafer data including bottom CD measurement for critical pattern clips and cross-sectional SEM images from selected patterns have shown good matching with the simulation results, indicating that resist-profile aware SMO is a feasible approach to optimize the illumination sources for a reasonable bottom CD based process window as well as favorable resist profiles.

Citation Download Citation

Ao Chen, Yee Mei Foong, Michael Hsieh, Andrew Khoh, Stephen Hsu, Mu Feng, Jianhong Qiu, and Chris Aquino "Resist profile aware source mask optimization", Proc. SPIE 9053, Design-Process-Technology Co-optimization for Manufacturability VIII, 90530X (28 March 2014); https://doi.org/10.1117/12.2046252

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KEYWORDS

Source mask optimization

Optical proximity correction

Semiconducting wafers

Image processing

Photomasks

Photoresist processing

Critical dimension metrology

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