28 March 2014 Line roughness formation during plasma etch: mechanism and reduction
Author Affiliations +
In this work, we have investigated the evolution of line roughness from e-beam lithography to final gate patterning based on conventional SiO2/Si3N4/SiO2 (ONO) hard mask using a Capacitively Coupled Plasma (CCP) etcher. A severe roughness was observed on gate patterning line when PR patterns were directly transferred into ONO hard mask even if a high etch selectivity of ONO hard mask to PR was used by CF4/CH2F2/Ar plasma. The formation mechanisms of line roughness were presented by a) effect of decomposed oxygen radical from bulk SiO2 by ion bombardment, b) rough surface morphology of poly-silicon accelerates etch of both hard mask and PR sidewalls by reflected ion. It is found that a combination of a capping layer and α-Si gate can reduce strong dependence on PR mask and eliminate ion reflection effect from rough surface morphology. Our results show that gate pattern indicates a smooth line without deformation and final gate length of 29nm with Line Width Roughness of 3.5nm is achieved.
© (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Lingkuan Meng, Lingkuan Meng, Xiaobin He, Xiaobin He, Chunlong Li, Chunlong Li, Junfeng Li, Junfeng Li, Chao Zhao, Chao Zhao, Jiang Yan, Jiang Yan, "Line roughness formation during plasma etch: mechanism and reduction", Proc. SPIE 9054, Advanced Etch Technology for Nanopatterning III, 90540D (28 March 2014); doi: 10.1117/12.2046327; https://doi.org/10.1117/12.2046327

Back to Top