Submicron Resolution Automated Track Development Processes, Part 1: Static Puddle Development

Michael K. Templeton; James B. Wickman; Ronald L. Fischer Jr.

doi:10.1117/12.968384

1 January 1988 Submicron Resolution Automated Track Development Processes, Part 1: Static Puddle Development

Michael K. Templeton, James B. Wickman, Ronald L. Fischer Jr.

Proceedings Volume 0921, Integrated Circuit Metrology, Inspection, and Process Control II; (1988) https://doi.org/10.1117/12.968384
Event: Santa Clara Symposium on Microlithography, 1988, Santa Clara, CA, United States

Abstract

Differences between puddle, immersion, and spray development were discussed. Issues affecting submicron profiles were characterized in detail with the aid of both computationally and experimentally generated 0.6 micron (g) profiles. Dissolution rate data for various processes were compared. Modifications to a Perkin-Elmer Development Rate Monitor (DRM) were made to obtain the dissolution rate data; 700nm illumination was used in place of the standard 633nm illumination in order to reduce signal attenuation for low agitation development processes, and the development stage was adapted for use with track processes (puddle). Time and spatial variations in developer temperature accounted for most observed differences between puddle developed and immersion developed profiles. A 3°C drop in the puddle temperature during the course of development produced a substantial alteration in resist profile. Variations in across wafer temperature account for most across wafer critical dimension (CD) variations in puddle processes. No substantial developer depletion effects were observed for single puddle processes. Controlled agitation in immersion development was seen to simultaneously increase photosensitivity and wall angle over non-agitated immersion development.

Citation Download Citation

Michael K. Templeton, James B. Wickman, and Ronald L. Fischer Jr. "Submicron Resolution Automated Track Development Processes, Part 1: Static Puddle Development", Proc. SPIE 0921, Integrated Circuit Metrology, Inspection, and Process Control II, (1 January 1988); https://doi.org/10.1117/12.968384

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available