In microelectronics, more and more attention is paid to the physical characterization of interconnections, to get a better
understanding of reliability issues like voiding, cracking and performance degradation. Those interconnections have a 3D
architecture with features in the deep sub-micrometer range, requiring a probe with high spatial resolution and high
penetration depth. Third generation synchrotron sources are the ideal candidate for that, and we show hereafter the
potential of synchrotron-based hard x-ray nanotomography to investigate the morphology of through silicon vias (TSVs)
and copper pillars, using projection (holotomography) and scanning (fluorescence) 3D imaging, based on a series of
experiments performed at the ESRF. In particular, we highlight the benefits of the method to characterize voids, but also
the distribution of intermetallics in copper pillars, which play a critical role for the device reliability.
Beyond morphological imaging, an original acquisition scheme based on scanning Laue tomography is introduced. It
consists in performing a raster scan (z,θ) of a sample illuminated by a synchrotron polychromatic beam while recording
diffraction data. After processing and image reconstruction, it allows for 3D reconstruction of grain orientation, strain
and stress in copper TSV and also in the surrounding Si matrix.