New LEEPL technology

Takao Utsumi

doi:10.1117/12.2073508

17 October 2014 New LEEPL technology

Takao Utsumi

Proceedings Volume 9231, 30th European Mask and Lithography Conference; 92310D (2014) https://doi.org/10.1117/12.2073508
Event: 30th European Mask and Lithography Conference, 2014, Dresden, Germany

Abstract

A new concept of semiconductor lithography is presented. The new technology is tentatively called as New LEEPL since it is an outgrowth of LEEPL which has been developed around 2002. However the new system is completely different from LEEPL. Instead of a single membrane mask used in LEEPL, we use “mask wafer” where mask patterns are made on a wafer by NIL at corresponding positions of chip patterns of chip wafer. The mask patterns on mask wafer have parallel struts structure of 2 division complementary mask (2-DCMPS) Gold (or Si ) dots of thickness of ~50μm are made on the surface of struts and scribing region for equalizing the temperature of mask wafer and chip wafer. Without these contact dots the temperature difference of ~0.5 K will be generated by full power of 1000μA at 2KV. Both mask wafer and chip wafer are cramped together and kept united throughout the processes. The overlay errors between mask patterns and corresponding chip patterns are measured optically. The error map data are fed to 10 e-beam column array to correct the overlay placement errors. Each column does not have main scanning deflector but has tiny deflector only for beam-tilt operation to correct errors. It can deliver 100μA without space charge blur and thus the resolution of L/S pattern of 10nm range can be achieved at resist thickness of 20nm. The e-beam exposure over the mask is performed by the stage motion. Since mask wafer does not have thermal distortion, the thin membrane’s distortion alone will affect the image placement accuracy. In order to obtain less than 1nm distortion of the membrane, the size of 2-DCPS must be smaller 0.7mm.

Citation Download Citation

Takao Utsumi "New LEEPL technology", Proc. SPIE 9231, 30th European Mask and Lithography Conference, 92310D (17 October 2014); https://doi.org/10.1117/12.2073508

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KEYWORDS

Photomasks

Semiconducting wafers

Charged-particle lithography

Distortion

Nanoimprint lithography

Silicon

Wafer-level optics

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