11 November 2014 A 20MHz 15μm pitch 128×128 CTIA ROIC for InGaAs focal plane array
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A 128×128 matrix readout integrated circuit (ROIC) for 15×15 μm2 InGaAs focal plane array (FPA) is reported in this paper. Capacitive-feedback Trans-Impedance Amplifier (CTIA) and correlated double sampling (CDS) are both involved in ROIC pixel which dissipates 90nW and has a full-well-capacity (FWC) of about 78,000 e-. Noises of ROIC pixel are analyzed and distribution method of capacitors in pixel is discussed in order to obtain low-noise performance. In column buffer circuit, a new pre-charging technique is developed to realize readout rate of 20 MHz with low power consumption. The ROIC is fabricated with 0.18-μm 3.3 V mixed signal CMOS process. Test results show that the ROIC has an equivalent input noise of about 181e- and can achieve a readout rate of 20 MHz.
© (2014) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Zhangcheng Huang, Zhangcheng Huang, Yu Chen, Yu Chen, Songlei Huang, Songlei Huang, Jiaxiong Fang, Jiaxiong Fang, "A 20MHz 15μm pitch 128×128 CTIA ROIC for InGaAs focal plane array", Proc. SPIE 9275, Infrared, Millimeter-Wave, and Terahertz Technologies III, 92750T (11 November 2014); doi: 10.1117/12.2074196; https://doi.org/10.1117/12.2074196


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