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3 April 2015 Silicon photonic devices based on SOI/bulk-silicon platforms for chip-level optical interconnects
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Proceedings Volume 9368, Optical Interconnects XV; 93680Z (2015)
Event: SPIE OPTO, 2015, San Francisco, California, United States
Based on either a SOI wafer or a bulk-silicon wafer, we discuss silicon photonic devices and integrations for chip-level optical interconnects. We present the low-voltage silicon PICs on a SOI wafer, where Si modulators and Ge-on-Si photodetectors are monolithically-integrated for intra-chip or inter-chip interconnects over 40 Gb/s. For future chip-level integration, the 50 Gb/s small-sized depletion-type MZ modulator with the vertically-dipped PN-depletion-junction (VDJ) is also presented. We report vertical-illumination-type Ge photodetectors on bulk-silicon wafers, with high performances up to 50 Gb/s. We present the bulk-silicon platform for practical implementation of chip-level interconnects, and the performance of the photonic transceiver silicon chip.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Gyungock Kim, In Gyoo Kim, Sanghoon Kim, Jiho Joo, Ki-Seok Jang, Sun Ae Kim, Jin Hyuk Oh, Jeong Woo Park, Myung-Joon Kwack, Jaegyu Park, Hyundai Park, Gun Sik Park, and Sanggi Kim "Silicon photonic devices based on SOI/bulk-silicon platforms for chip-level optical interconnects", Proc. SPIE 9368, Optical Interconnects XV, 93680Z (3 April 2015);


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