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19 March 2015 Target design optimization for overlay scatterometry to improve on-product overlay
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Scatterometry mark design for improvement of the metrology performance is investigated in this joint work by ASML and STMicroelectronics. The studied marks are small, enabling metrology within the device area. The new mark-design approach reduces the effects from the mark-edges during the metrology measurement. For this, small assist-features are integrated in the mark design on the wafer. Thereby the new designs: 1. enlarge the metrology measurement-window, 2. optimize the repeatability and accuracy of the metrology at given mark size, 3. allow added functionality to existing marks within the current mark area, such as monitoring process asymmetry or multiple layer information, 4. allow for mark miniaturization at equal performance, enabling intra-field positioning. With this metrology tool-optical proximity correction (MT-OPC) included in the mark design, the metrology window is enhanced, while improved on-product overlay performance is obtained.
© (2015) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Henk-Jan H. Smilde, Richard J. F. van Haren, Willy van Buël, Lars H. D. Driessen, Jérôme Dépré, Jan Beltman, Florent Dettoni, Julien Ducoté, Christophe Dezauzier, and Yoann Blancquaert "Target design optimization for overlay scatterometry to improve on-product overlay", Proc. SPIE 9424, Metrology, Inspection, and Process Control for Microlithography XXIX, 942412 (19 March 2015);

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