19 March 2015 Improvement of depth of focus control using wafer geometry
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For several decades, the semiconductor industry has been controlling site flatness of the starting wafer material by defining tight specs on industry-standard site flatness metrics such as SFQR (Site Frontsurface-referenced least sQuares/Range) and ESFQR (Edge Site Frontsurface-referenced least sQuares/Range) that scale with technology nodes. The need for controlling site flatness of the starting material stems from previous research that shows that site flatness directly impacts lithography defocus. The wafer flatness variation changes significantly due to wafer processing downstream such as CMP, etch, and film deposition. Hence, for 2X nm and smaller technology nodes with very stringent focus process windows, it is critical to control wafer flatness variations at critical steps along the semiconductor process flow. In this paper, the capability of an interferometer-based patterned wafer metrology tool to predict lithography defocus is validated by comparison to scanner leveling data. The patterned wafer metrology tool is used to characterize the impact of near-edge flatness changes on the critical dimension (CD) of the contact holes due to different edge CMP process conditions. The results of the characterization illustrate how a site flatness specification or threshold can be developed for critical patterning steps. The paper also illustrates how the patterned wafer metrology tool can be used to identify processes causing site flatness variations. Finally, the site flatness variation at these processes can be monitored using the pattern wafer metrology tool to detect process drifts and excursion before patterning.
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Honggoo Lee, Honggoo Lee, Jongsu Lee, Jongsu Lee, Sangmin Kim, Sangmin Kim, Changhwan Lee, Changhwan Lee, Sangjun Han, Sangjun Han, Myoungsoo Kim, Myoungsoo Kim, Wontaik Kwon, Wontaik Kwon, Sung-Ki Park, Sung-Ki Park, Sathish Veeraraghavan, Sathish Veeraraghavan, JH Kim, JH Kim, Amartya Awasthi, Amartya Awasthi, Jungho Byeon, Jungho Byeon, Dieter Mueller, Dieter Mueller, Jaydeep Sinha, Jaydeep Sinha, "Improvement of depth of focus control using wafer geometry", Proc. SPIE 9424, Metrology, Inspection, and Process Control for Microlithography XXIX, 942428 (19 March 2015); doi: 10.1117/12.2085848; https://doi.org/10.1117/12.2085848


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