20 March 2015 Thickness optimization for lithography process on silicon substrate
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Abstract
With the development of the lithography, the demand for critical dimension (CD) and CD uniformity (CDU) has reached a new level, which is harder and harder to achieve. There exists reflection at the interface between photo-resist and substrate during lithography exposure. This reflection has negative impact on CD and CDU control. It is possible to optimize the litho stack and film stack thickness on different lithography conditions. With the optimized stack, the total reflectivity for all incident angles at the interface can be controlled less than 0.5%, ideally 0.1%, which enhances process window (PW) most of the time. The theoretical results are verified by the experiment results from foundry, which helps the foundry achieve the mass production finally.
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Xiaojing Su, Yajuan Su, Yansong Liu, Fong Chen, Zhimin Liu, Wei Zhang, Bifeng Li, Tao Gao, Yayi Wei, "Thickness optimization for lithography process on silicon substrate", Proc. SPIE 9425, Advances in Patterning Materials and Processes XXXII, 94251Z (20 March 2015); doi: 10.1117/12.2085656; https://doi.org/10.1117/12.2085656
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