18 March 2015 An efficient lithographic hotspot severity analysis methodology using Calibre PATTERN MATCHING and DRC application
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Abstract
As the IC industry moves forward to advanced nodes, especially under 28nm technology, the printability issue is becoming more and more challenging because layouts are more congested with a smaller critical feature size and the manufacturing process window is tighter. Consequently, design-process co-optimization plays an important role in achieving a higher yield in a shorter tape-out time. A great effort has to be made to analyze the process defects and build checking kits to deliver the manufacturing information, by utilizing EDA software, to designers to dig out the potential manufacturing issues and quickly identify hotspots and prioritize how to fix them according to the severity levels. This paper presents a unique hotspot pattern analysis flow that SMIC has built for advanced technology to analyze the potential yield detractor patterns in millions of patterns from real designs and rank them with severity levels related to real fab process. The flow uses Mentor Graphics Calibre® PM (Calibre® Pattern Matching) technology for pattern library creation and pattern clustering; meanwhile it incorporates Calibre® LFD (Calibre® Litho-Friendly Design) technology for accurate simulation-based lithographic hotspot checking. Pattern building, clustering, scoring, ranking and fixing are introduced in detail in this paper.
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ZeXi Deng, ZeXi Deng, ChunShan Du, ChunShan Du, Lin Hong, Lin Hong, LiGuo Zhang, LiGuo Zhang, JinYan Wang, JinYan Wang, } "An efficient lithographic hotspot severity analysis methodology using Calibre PATTERN MATCHING and DRC application", Proc. SPIE 9427, Design-Process-Technology Co-optimization for Manufacturability IX, 94270Y (18 March 2015); doi: 10.1117/12.2086041; https://doi.org/10.1117/12.2086041
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