Estimation technique for SET-tolerance of combinational ICs

A. Balbekov; M. Gorbunov

doi:10.1117/12.2180608

18 December 2014 Estimation technique for SET-tolerance of combinational ICs

A. Balbekov, M. Gorbunov

Proceedings Volume 9440, International Conference on Micro- and Nano-Electronics 2014; 94401A (2014) https://doi.org/10.1117/12.2180608
Event: The International Conference on Micro- and Nano-Electronics 2014, 2014, Zvenigorod, Russian Federation

Abstract

The paper presents an estimation technique for single event transient (SET) tolerance of combinational circuits. Technique provides means to analyze each node contribution to the overall SET tolerance of circuit. A software tool calculates critical charge of each node of circuit, process gathered data and displays it in circuit editor. The technique is technology-independent, it can be applied to nanoscale technologies.

Citation Download Citation

A. Balbekov and M. Gorbunov "Estimation technique for SET-tolerance of combinational ICs", Proc. SPIE 9440, International Conference on Micro- and Nano-Electronics 2014, 94401A (18 December 2014); https://doi.org/10.1117/12.2180608

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