4 June 2015 Low-power LVDS for digital readout circuits
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This paper presents a mixed-signal LVDS driver in 90 nm CMOS technology. The designed LVDS core is to be used as a data link between Infrared Focal Plane Array (IRFPA) detector end and microprocessor input. Parallel data from 220 pixels of IRFPA is serialized by LVDS driver and read out to microprocessor. It also offers a reduced power consumption rate, high data transmission speed and utilizes dense placement of devices for area efficiency. The entire output driver circuit including input buffer draws 5mA while the output swing is 500mV at power supply of 1.2V for data rate of 6.4Gbps.Total LVDS chip area is 0.79 mm2. Due to these features, the designed LVDS driver is suitable for purposes such as portable, high-speed imaging.
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Melik Yazici, Melik Yazici, Huseyin Kayahan, Huseyin Kayahan, Omer Ceylan, Omer Ceylan, Atia Shafique, Atia Shafique, Yasar Gurbuz, Yasar Gurbuz, "Low-power LVDS for digital readout circuits", Proc. SPIE 9451, Infrared Technology and Applications XLI, 94510Y (4 June 2015); doi: 10.1117/12.2177556; https://doi.org/10.1117/12.2177556

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